This invention relates to a duty ratio adjusting circuit, in particular, to a duty ratio adjusting circuit having analog buffer circuits and a differential amplifier.
A conventional duty ratio adjusting circuit is configured to produce two preliminary signals having different phases from an input pulse signal and to produce an output pulse signal by using the preliminary signals.
The conventional duty ratio adjusting circuit has no feedback loop. Accordingly, the conventional duty ratio adjusting circuit has disadvantage that a duty ratio of the output signal is changed by aged deterioration of the components thereof.
Such a duty ratio adjusting circuit is disclosed in Unexamined Japanese Patent Publication No. 5-29893, 9-214307 or P2003-243973A.
Another conventional duty ratio adjusting circuit has a feedback loop in addition to an inverter and a wave shaping buffer. The inverter inverts an input pulse signal and the wave shaping buffer shapes the inverted pulse signal to produce an output pulse signal. The feedback loop serves to control rising and falling times of an output signal of the inverter or a logic threshold voltage of the wave shaping buffer.
However, the conventional duty ratio adjusting circuit has no pair of analog buffers to obtain stable input-output characteristics.